Hi there, if anyone can help or point me in some direction it would be most appreciated.

I am writing an application that will synchronise the video output of a graphics card (NVidia) to an incomming program stream (MPEG4). The reason for this is to stop horizontal tearing. I have managed to enumerate the video card on the PCI Bus, gather it's Memory Start Address information and I can directy read the display ram. I beleive I have found the start address for the memory mapped CRTC registers etc. My problem is that I now have no idea as to where and what all the appropriate registers are. I am trying to do this because I believe that if I poll the buffer status register, I should be able to determine when a third party video decoder is trying to do a screen refresh with a new frame of video. And by using this in conjunction with the vertical retrace I could then make adjustments to the timing registers to synchronise the whole thing. The result should be silky smooth video with no dropped or repeated frames.

If anyone has had some experience with talking directly to NVidia graphics cards I would be most appreciative of any advice I can get.

Thank you in advance.

I'd love to help, but I just don't know a darned thing about coding with graphics cards yet. I'm not sure if anyone else in the forum does either, but I wish you good luck on your project. Have you tried looking up some instructional websites or in some instructional books dealing with Nvidia cards? Nvidia may offer support for developers who are writing software for their chips.

I have posted a request to NVidia already and in a couple of other forums, I am waiting for their replies...