MAKE file assistance

emp · #1 07-Feb-2008, 15:14

Below is my makefile
It works fine as it is
I want to put all the .o files into the ../bin/ directory OBJDIR
then upon a clean I want the .o's removed from that directory
I was able to get the executable to go into the ../exe/ directory and it is removed upon a clean. I have over 80 .cpp files so far. The directory is crowded enough without all the .o's in the way.

I cannot get it the .o's to go to the OBJDIR directory. Any help would be appreciated.

Code:

CC=g++
CFLAGS=-c -Wall
LDFLAGS=
OBJDIR=../bin/
SOURCES=a.cpp \
              b.cpp \
              c.cpp \
              d.cpp \
              e.cpp
OBJECTS=$(SOURCES:.cpp=.o)
EXECUTABLE=../exe/msg_broker

all: $(SOURCES) $(EXECUTABLE)

$(EXECUTABLE): $(OBJECTS) 
$(CC) $(LDFLAGS) $(OBJECTS) -o $@

.cpp.o:
$(CC) $(CFLAGS) $< -o $@

clean:
-rm -rf *.o
-rm -rf $(EXECUTABLE)

davekw7x · #2 07-Feb-2008, 19:05

Quote:

Originally Posted by emp

I want to put all the .o files into the ../bin/ directory OBJDIR

Maybe something like:

Code:

#
# Source files are in current directory
# Executable and object files are in other directories
#
CXX        = g++
CXXFLAGS   = -c -Wall -W -pedantic
LDFLAGS    =

OBJDIR     = ../bin
EXEDIR     = ../exe

PROG       = msg_broker
EXECUTABLE = $(EXEDIR)/$(PROG)

SOURCES    = a.cpp b.cpp c.cpp d.cpp e.cpp
OBJECTS    = $(SOURCES:.cpp=.o)
OBJFILES   = $(addprefix $(OBJDIR)/, $(OBJECTS))

all: $(EXECUTABLE)


$(EXECUTABLE): $(OBJFILES)
	$(CXX) $(LDFLAGS) $^ -o $@

$(OBJDIR)/%.o : %.cpp
	$(CXX) $(CXXFLAGS) $< -o $@

clean:
	-rm -rf $(OBJDIR)/*.o
	-rm -rf $(EXECUTABLE)

Regards,

Dave

emp · #3 26-Feb-2008, 15:48

In the make file below I now must change the SOURCES line from
SOURCES = a.cpp b.cpp c.cpp d.cpp e.cpp
to
SOURCES = a.cpp b.cpp c.cpp d.cpp e.cpp f.c
I have to compile a .c file also.

Can I do this, mixing c and c++. What additional syntax needs to be added? I am getting a "no rule to compile" error on the f.c file.

My application will be running the main out of .c code (it is a real time application so .c is the only option for me) I will be calling functions in the c++ code.

Thanks

emp1953

davekw7x · #4 26-Feb-2008, 18:16

Quote:

Originally Posted by emp

Can I do this, mixing c and c++.

I will take this one first. The first answer has nothing to do with GNU make or its Makefile, but tells the C++ compiler not to mangle the names so that they can be linked with the main program object file created from a C source file.

In order to make your C++ object files linkable with your C main file, here's the drill. (There are almost surely other ways, but this is the simplest that I can think of off of the top of my pointed little head, just now.)

Surround all of the code in your C++ files with extern "C" {}

So, for example a.cpp can look like:

CPP / C++ / C Code:

//
// a.cpp
// This is going to create an object file
// that can be linked with a C main file
//
extern "C" {
    int a()
    {
        return 11;
    }
}

b.cpp would look like:

CPP / C++ / C Code:

//
// b.cpp
// This is going to create an object file
// that can be linked with a C main file
//
extern "C" {
    int b()
    {
        return 22;
    }
}

etc. for c.cpp, d.cpp, e.cpp

Then the main file, f.c could look like:

CPP / C++ / C Code:

/* 
 * f.c: 
 * Everything here is straight C
 */
#include <stdio.h>

extern int a(void);
extern int b(void);
extern int c(void);
extern int d(void);
extern int e(void);

int main()
{
    int aa;
    int bb;
    int cc;
    int dd;
    int ee;
    aa = a();
    bb = b();
    cc = c();
    dd = d();
    ee = e();
    printf("aa = %d\n", aa);
    printf("bb = %d\n", bb);
    printf("cc = %d\n", cc);
    printf("dd = %d\n", dd);
    printf("ee = %d\n", ee);
    return 0;
}

Now, stop! Forget the makefile for now, and make absolutely sure that you can compile and execute all of these things.

So, from the command line, compile all of your C++ files into object files with "g++ -c" and compile your C file into an object file with "gcc -c". Make sure your files have the proper extensions for that file's compiler. That is important.

Code:

rm *.o
g++ -c [abcde].cpp
gcc -c f.c

Now you should have six object files in the current directory: a.o, b.o, c.o, d.o, e.o and f.o

Make an executable with gcc

Code:

gcc a.o b.o c.o d.o e.o f.o -omsg_broker

If you got no errors, then you can execute the program:

Code:

./msg_broker
aa = 11
bb = 22
cc = 33
dd = 44
ee = 55

If this doesn't work, then let us know. Don't even think about the Makefile unless and until you get this part working. (Obviously, you don't necessarily have to do the whole shebang; just a couple of .cpp files and your main .c file.)

Now, are you ready for the next step?

The problem with the Makefile approach is that you need a different rule for creating an object file from a C++ file than for creating an object file from a C file.

Here's one way: Use a different name (other than the default "xxx.o") for one or the other case. Then you have one rule, using gcc. for the C object file(s) and another rule, using g++, for the C++ object files.

Then the makefile (based on my previous example) could look something like:

Code:

#
# Source files are in current directory
# Object files from the .cpp files are given the (non-standard) extension ".opp"
# Object files from the .c file is given the standard extension ".o"
# Executable and object files are in other directories
#
CC         = gcc
CFLAGS     = -c -Wall -W -pedantic

CXX        = g++
CXXFLAGS   = -c -Wall -W -pedantic

LDFLAGS    =

OBJDIR     = ../bin
EXEDIR     = ../exe

PROG       = msg_broker
EXECUTABLE = $(EXEDIR)/$(PROG)

CXXSOURCES = a.cpp b.cpp c.cpp d.cpp e.cpp
CSOURCES   = f.c
CXXOBJECTS = $(CXXSOURCES:.cpp=.opp)
COBJECTS   = $(CSOURCES:.c=.o)
OBJECTS    = $(CXXOBJECTS) $(COBJECTS)
OBJFILES   = $(addprefix $(OBJDIR)/, $(OBJECTS))

all: $(EXECUTABLE)


$(EXECUTABLE): $(OBJFILES)
	$(CC) $(LDFLAGS) $^ -o $@

$(OBJDIR)/%.opp : %.cpp
	$(CXX) $(CXXFLAGS) $< -o $@

$(OBJDIR)/%.o: %.c
	$(CC) $(CFLAGS) $< -o $@

clean:
	rm -f $(OBJFILES) $(EXECUTABLE)

Regards,

Dave

Footnote: I have tested everything in my posts in this thread with GNU compilers and the GNU make program on various Linux and Windows/cygwin installations. Nothing is guaranteed by the C (or C++) standard or by me or by anything else that I know of.

In other words: IWFM;YMMV (It Works For Me; Your Mileage May Vary)

emp · #5 27-Feb-2008, 10:02

I ran through your first exercise and all went well, no errors and I could execute the output file.

My implementation of the makefile caused the following error;
'''''''''''''''''''''''''''''''''''''''''''''''''' '''''''''''''''
g++ -c -Wall -g -W -pedantic a.cpp -o ../bin/a.opp
Assembler messages:
FATAL: can't create ../bin/a.opp: No such file or directory
make: *** [../bin/a.opp] Error 1
'''''''''''''''''''''''''''''''''''''''''''''''''' '''''''''''''''

My make file is below:

CC = gcc
CXX = g++
CFLAGS = -c -Wall -g -W -pedantic
CXXFLAGS = -c -Wall -g -W -pedantic
LDFLAGS = -lnsl

OBJDIR = ../bin
EXEDIR = ../exe

PROG = msg_broker
EXECUTABLE = $(EXEDIR)/$(PROG)

CXXSOURCES = a.cpp b.cpp c.cpp d.cpp e.cpp
CSOURCES = f.c
CXXOBJECTS = $(CXXSOURCES:.cpp=.opp)
COBJECTS = $(CSOURCES:.c=.o);
OBJECTS = $(CXXOBJECTS) $(COBJECTS)
OBJFILES = $(addprefix $(OBJDIR)/,$(OBJECTS))

all: $(EXECUTABLE)

$(EXECUTABLE): $(OBJFILES)
$(CXX) $(LDFLAGS) $^ -o $@

$(OBJDIR)/%.opp : %.cpp
$(CXX) $(CXXFLAGS) $< -o $@

$(OBJDIR)/%.o: %.c
$(CC) $(CFLAGS) $< -o $@

clean:
-rm -rf $(OBJECTS)
-rm -rf $(EXECUTABLE)
clear

davekw7x · #6 27-Feb-2008, 11:26

Quote:

Originally Posted by emp

...
'''''''''''''''''''''''''''''''''''''''''''''''''' '''''''''''''''
g++ -c -Wall -g -W -pedantic a.cpp -o ../bin/a.opp
Assembler messages:
FATAL: can't create ../bin/a.opp: No such file or directory
make: *** [../bin/a.opp] Error 1
'''''''''''''''''''''''''''''''''''''''''''''''''' '''''''''''''''

This is caused when you run make clean (Or if you start without having created directories ../bin and ../exe)

Look at the clean: stuff.

Quote:

Originally Posted by emp

Code:

clean:
	-rm -rf $(OBJECTS)
	-rm -rf $(EXECUTABLE)

This removes the directories as well as the files.

Now, look at my latest post:

Code:

clean:
	rm -f $(OBJFILES) $(EXECUTABLE)

This removes the files but not the directories.

If you make it like my most recent post then:

Before running the make for the first time, make sure directories ../bin and ../exe exist. (That's what your original Makefile assumed.)

Better yet, put shell commands in the Makefile to make sure that those directories exist before trying to access them.

Regards,

Dave

Regards,

Dave

emp · #7 28-Feb-2008, 06:34

Dave,

The directories are there, before and after. The permissions are wide open.
I made the change in the clean: section. I continue to get the same error.

g++ -c -Wall -g -W -pedantic a.cpp -o ../bin/a.opp
Assembler messages:
FATAL: can't create ../bin/a.opp: No such file or directory
make: *** [../bin/a.opp] Error 1

emp · #8 28-Feb-2008, 06:36

Could there be an issue with the ".opp" extension as opposed to just the ".o" extension.

emp · #9 28-Feb-2008, 06:49

If I change .opp to .o I get a "no rule to make it" error

emp · #10 28-Feb-2008, 07:43

Dave,

I found that if I changed the lines:

OBJDIR = ../bin
EXEDIR = ../exe

to

OBJDIR = .
EXEDIR = .

That it all compiled and ran fine, I think I know what is wrong.

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MAKE file assistance

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